| 摘要 |
A method for fabricating a semiconductor device including a lower electrode layer provided at a surface thereof with hemispherical grains, an upper electrode layer, and a dielectric layer interposed between the lower and upper electrode layers, involving dry etching a conduction layer, formed for the lower electrode layer, in such a fashion that the lower electrode layer has an increased dopant concentration at the surface thereof while exhibiting a minimum etch damage thereof. In accordance with this method, it is possible to prevent a reduction in the dopant concentration at the surface of hemispherical grains formed on the lower electrode layer. Thus, a high Cmin/Cmax ratio is obtained.
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