发明名称 TEST CIRCUIT FOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To write and read data to and out of a tested circuit in substantially arbitrary order only by adding a simple circuit. SOLUTION: A write control circuit 8 is equipped with a flip-flop circuit which inverts its output each time a TAP controller 14 outputs an idle signal Idle representing that the TAP controller 14 is idle and is reset with a reset signal Reset outputted by the TAP controller 14 and this flip-flop circuit outputs its output as a write enable signal JWrEn to the tested circuit 4. The write enable signal JWrEn can be set by controlling the frequency of the transition of the TAP controller 14 to the idle state and data can be written to an internal register 60 with a write signal JWr only when necessary by controlling a 2nd selector 66.
申请公布号 JP2001147253(A) 申请公布日期 2001.05.29
申请号 JP19990329950 申请日期 1999.11.19
申请人 NEC CORP 发明人 MIYAMOTO KAZUNORI
分类号 G06F11/22;G01R31/28 主分类号 G06F11/22
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