发明名称 LAYERED CAPACITOR, WIRING BOARD, DECOUPLING CIRCUIT AND HIGH-FREQUENCY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the equivalent series inductance (ESL) of a layered capacitor. SOLUTION: First and second through conductors 20, 20a, 21, 21a, by which a first internal electrode 14 and a second internal electrode 15 which are faced with each other and a first external terminal electrode and a second external terminal electrode are connected electrically, are arranged in such a way that electric fields induced by currents flowing in the internal electrodes 14, 15 are offset mutually. Some of the through conductors are given by the first and second edge through conductors 20a which are connected to the first and second internal electrodes 14, 15 in respective peripheral edges of the first and second internal electrodes 14, 15.
申请公布号 JP2001148325(A) 申请公布日期 2001.05.29
申请号 JP19990329012 申请日期 1999.11.19
申请人 MURATA MFG CO LTD 发明人 NAITO YASUYUKI;TANIGUCHI MASAAKI;KURODA TAKAKAZU;HORI HARUO;KONDO TAKANORI
分类号 H01G4/12;H01G4/232;H01G4/30;H01L23/498;H01L23/50;H01L23/64;H05K1/02 主分类号 H01G4/12
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