发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To solve at once both the problems of planarizing being difficult, when a dummy pattern is large and the data quantity increases taking much time, when the dummy pattern is small. SOLUTION: In a process adopting the shallow trench isolation, small dummy patterns 2 are formed inside a p-well 3 and an n-well 4, and large dummy pattern patterns 1 are formed outside the p-well 3 and the n-well 4.
申请公布号 JP2001144171(A) 申请公布日期 2001.05.25
申请号 JP19990327103 申请日期 1999.11.17
申请人 NEC CORP 发明人 FUJII TAKUYA
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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