发明名称 |
METHOD AND APPARATUS FOR DIGITAL SIGNAL PROCESSING |
摘要 |
<p>Elements required for a digital television receiver are divided into a plurality of digital signal processor blocks and a host microprocessor block . The blocks are connected by general buses, through which commands and stream s of data are transferred to control the operations of the blocks. An encrypti on encoder/decoder circuit is provided on each of the blocks to protect content s transferred through the buses. An encryption encoder/decoder circuit is also provided on an interface with plug-in extension cards so as to protect the contents output from the interface.</p> |
申请公布号 |
CA2360552(A1) |
申请公布日期 |
2001.05.25 |
申请号 |
CA20002360552 |
申请日期 |
2000.11.17 |
申请人 |
SONY CORPORATION |
发明人 |
FURUI, SUNAO;MORIWAKI, HISAYOSHI;HAMADA, ICHIRO;NAKAMURA, MASASHI |
分类号 |
G06F21/10;H04H20/00;H04H60/23;H04H60/95;H04L9/10;H04N5/00;H04N5/44;H04N5/46;H04N7/16;H04N7/167;H04N21/2347;H04N21/4367;H04N21/4405;(IPC1-7):H04N7/167;H04B1/16;H04H1/00 |
主分类号 |
G06F21/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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