SEMICONDUCTOR INTEGRATED CIRCUIT SIMULATION METHOD AND SIMULATOR

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit simulation method and a simulator, with which the accuracy of circuit connection information with RC outputted from layout after automatic arrangement and wiring processing and a logic delay simulation using the information can be improved. SOLUTION: This method has a process for providing the respective ports of the same terminal in cell layout with different recognition names and a process for preparing inter-port wiring information together with an existing library or as a new library by extracting wiring resistance and capacitance between the respective relevant ports.