A METHOD OF FORMING WIRES ON AN INTEGRATED CIRCUIT CHIP

摘要

A damascene method of forming conductive lines in an integrated circuit chip. Trenches are etched by a plasma formed by capacitively coupling a gas mixture at 500 to 3000watts under a pressure of 50 - 400mTorr. The gas mixture includes 2 - 30sccm of C4F8<, 20 - 80sccm of CO, 2 - 30sccm of O>2< and 50 - 400sccm of Ar. Gas flow can be adjusted to an optimum level, thereby achieving a high degree of uniformity. Wafers falling below a selected uniformity may be reworked. A damascene wiring layer formed in the trenches with an acceptable flow exhibit a high degree of sheet resistance uniformity and improved line to line shorts yield.