| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-performance and reliable semiconductor device that can reduce collector diffusion resistance, without impairing the reliability of a transistor. SOLUTION: On a semiconductor substrate 1, an NPN transistor (a region 1A) and a MOS transistor (a region 1B) are mounted mixedly. In the collector take-out region (plug-in diffusion layer 4) of the NPN transistor, a recessed part 4A is provided, thus forming a collector at a lower position than an emitter and a base. Also, a diffusion layer 12 is formed, where the diffusion layer 12 is the same as the source/drain diffusion layers 23 and 24 of the MOS transistor which are formed simultaneously, thus reducing the spacing between a collector take-out electrode 9 and an impurity region below the electrode 9, and at the same time, increasing the concentration of impurities directly below the electrode, and hence reducing collector diffusion resistance without having to add manufacturing processes.
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