发明名称 Receiving circuit
摘要 A receiving circuit mainly available in a digital modulation type communication system having a plurality of channels, which is capable of reducing power in a receiving system, simplifying the circuit and reducing the power consumption. Upside and downside frequencies corresponding to a central value between channels are separately supplied from a local frequency signal generating circuit 4 to first and second frequency converting circuits 2, 3 so that two output signals are developed with respect to one of a desired wave, upside channel and downside channel. The desired wave present in common in the first and second frequency converting circuits 2, 3 is extracted in a common wave extracting circuit 5, and a frequency offset of omegao existing in the output of the common wave extracting circuit 5 is removed a frequency offset circuit 6 and further an unnecessary frequency component is filtered by a filter 8. In addition, the common wave extracting circuit 5 has transformers and, using its inductances, raises the difference between the common wave and the non-common wave within the circuit to more than two times that of a prior art.
申请公布号 US6236688(B1) 申请公布日期 2001.05.22
申请号 US19990258402 申请日期 1999.02.26
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OHTA GEN-ICHIRO;INOGAI KAZUNORI;SASAKI FUJIO
分类号 H03D1/22;H03D7/16;H04B1/12;H04B1/26;H04B5/00;(IPC1-7):H03D3/18 主分类号 H03D1/22
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