发明名称 Semiconductor memory and screening test method thereof
摘要 A semiconductor memory comprises a dynamic type memory cell array arranged to form a matrix and provided with word lines commonly connected to memory cells of respective columns and bit lines commonly connected to memory cells of respective rows, a dummy cell section having a first set of dummy word lines connected to respective complimentary bit line pairs of said memory cell array by way of respective first capacitances and a second set of dummy word lines connected to respective complementary bit line pairs of said memory cell array by way of respective second capacitances, a dummy word line potential control circuit capable of optionally controlling the mode of driving selected dummy word lines when said word lines of said memory cell array are activated and sense amplifiers connected to the respective complementary bit line pairs of said memory cell array for reading data from selected memory cells of the memory cell array onto the related bit line.
申请公布号 USRE37184(E1) 申请公布日期 2001.05.22
申请号 US19980108266 申请日期 1998.07.01
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KUSHIYAMA NATSUKI;FURUYAMA TOHRU;NUMATA KENJI
分类号 G11C29/02;G11C29/24;G11C29/50;(IPC1-7):G11C7/00 主分类号 G11C29/02
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