发明名称 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To ensure a wide channel region of a memory cell transistor and easily ensure an amount of current flowing a channel in reading necessary for a multilevel control technology even if a micro-patterning is advanced in a floating gate type semiconductor memory device. SOLUTION: A semiconductor memory device has a diffusion layer 3, which is formed straight on a semiconductor substrate 1 and becomes a source region and a drain region, silicon oxide film 7 to be a gate insulating film, floating gate electrode 15, control gate electrode 13, first interlayer dielectric 9, erasing gate electrode 17, tunneling insulating film 16, second interlayer dielectric 11, and a side wall insulating film 14. An element isolating insulating film 6 is arranged, only under the erasing gate electrode 17 between respective memory cells and an element isolating insulating 6 is omitted which is arranged also between the erasing gate electrodes 17 in a conventional semiconductor memory device. This can ensure a wide channel region of a transistor.
申请公布号 JP2001135730(A) 申请公布日期 2001.05.18
申请号 JP19990311842 申请日期 1999.11.02
申请人 MATSUSHITA ELECTRONICS INDUSTRY CORP 发明人 HIROOKA KEIICHI
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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