| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory device in which bank-interleave can be performed at a high speed frequency band by decreasing the number of lines of a common data bus. SOLUTION: The memory device having plural banks including plural memory cells and reading or writing data of the memory cell synchronizing with a clock signal, is provided with a sense amplifier provided in each bank and amplifying data read out from the memory cell, plural common data bus lines provided in plural banks in common and having less numbers than the number of the banks, and with a switch circuit provided in each bank and supplying or receiving data of the bank to/from the plural common data bus lines, and the device is characterized in that data of the plural banks are read out or written in by selecting the plural common data bus lines successively by the switch circuit.
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