发明名称 MEMORY ACCESS CONTROLLER
摘要 PROBLEM TO BE SOLVED: To reduce unnecessary power consumption by preventing addresses and data to be accessed from being inputted to all memory blocks, and to reduce a chip area by shortening a decoding time in each memory block. SOLUTION: Only the upper bits of an address to be accessed are decoded, and a memory block to be made active is designated. Therefore, only a low order address is inputted as an address to be applied to the memory block so that a processing speed can be quickened. Also, only the specific memory block is activated so that charging and discharging currents can be suppressed, and that power consumption can be reduced. Moreover, the upper bits of the address decoders which are conventionally owned by all memory blocks are processed by one decoder in a batch so that only the address decoder of the lower bits can be constituted at the memory block side, and that a chip area can be reduced.
申请公布号 JP2001134485(A) 申请公布日期 2001.05.18
申请号 JP19990314672 申请日期 1999.11.05
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 ENATSU NORIRO
分类号 G06F12/06;G06F12/00;G06F13/16;(IPC1-7):G06F12/06 主分类号 G06F12/06
代理机构 代理人
主权项
地址