发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS LAYOUT DESIGNING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To change the allocation of a pad for external connection according to a function to be actualized by a gate array and to actualize a plurality of functions by the same chip through easy setting as to a semiconductor integrated circuit which has a gate array and a microcomputer mounted on a single chip. SOLUTION: The semiconductor integrated circuit having on the single chip the gate array part with a 1st output terminal and an output select terminal and the microcomputer part is equipped with a means 201 which selects a 1st output signal OUT1 from the 1st output terminal and a 2nd output signal OUT2 from a 2nd output terminal of a circuit block other than the gate array part with an output select signal OSEL from the output select terminal and outputs the selected output signals to the outside of the chip.</p>
申请公布号 JP2001134551(A) 申请公布日期 2001.05.18
申请号 JP19990315561 申请日期 1999.11.05
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YANO JUNICHI
分类号 G06F15/78;G06F17/50;H01L21/822;H01L27/04;(IPC1-7):G06F15/78 主分类号 G06F15/78
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