发明名称 Logic circuit with single charge pulling out transistor and semiconductor integrated circuit using the same
摘要 A logic circuit performs a predetermined logic operation by supplying charge to an external load or pulling out charge therefrom according to a combination of the states of a plurality of externally inputted binary signals. The logic circuit includes a first transistor for supplying charge through an output terminal to the external load and a second transistor for pulling out the charge from the load through the output terminal. One of the first and second transistors is constituted by a MOS field-effect transistor having a drain connected to the output terminal. The MOS field-effect transistor has a source receiving an inverse signal inverse to a signal combined for logic operation with an input signal inputted to a gate of the MOS field-effect transistor. The number of the series transistors is reduced, resulting in an increase of the current capacity and in a reduction of the layout area. Adjacent ones of the logic circuits have a common source diffusion layer so that the load capacitance with respect to the inverse signal can be significantly reduced, thus enabling the high speed operation.
申请公布号 US6232795(B1) 申请公布日期 2001.05.15
申请号 US20000657190 申请日期 2000.09.07
申请人 NEC CORPORATION 发明人 TAKAHASHI HIROYUKI;SATO MITSURU
分类号 G11C11/413;G11C11/40;G11C11/408;H03K19/017;H03K19/08;H03K19/0944;H03K19/20;(IPC1-7):H03K19/094 主分类号 G11C11/413
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