| 摘要 |
A semiconductor memory device can inhibit undesirable fluctuations of memory cell signals that can occur at remote ends of the device, thereby improving sense margins over conventional approaches. The semiconductor memory device (100) can include a half power source (HVCC) level generating circuit that supplies a half-supply potential for an opposite-to-cell level and for precharging digit lines. Shunting circuits (103) can shunt the connection between the opposite-to-supply level HVCP1 and the precharge (reference) level, and are situated at various places close to sense amplifier areas. This arrangement can make it possible to inhibit fluctuations in signal levels that can occur due to capacitive coupling of indeterminate data nodes when a refresh operation is introduced after power-up. Such inhibiting of fluctuations can occur even for memory cells that are situated remotely from the HVCC level generating circuit. Consequently, sense margins can be improved over conventional approaches.
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