发明名称 |
Semiconductor device and manufacturing method thereof |
摘要 |
A gate electrode includes a polycrystalline silicon layer, a barrier layer and a metal layer. The metal layer and barrier layer includes for example W and RuO2 layers, respectively. In forming the gate electrode, the metal layer and barrier layer are etched using at least one of the barrier layer and polycrystalline silicon layer as an etching stopper.
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申请公布号 |
US6232209(B1) |
申请公布日期 |
2001.05.15 |
申请号 |
US19990440568 |
申请日期 |
1999.11.15 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
FUJIWARA NOBUO;MARUYAMA TAKAHIRO;SAKAMORI SHIGENORI;TERATANI AKEMI;OGINO SATOSHI;OHMI KAZUYUKI;IRIE YUZO |
分类号 |
H01L21/302;H01L21/28;H01L21/3065;H01L21/3213;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L21/320 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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