| 摘要 |
PURPOSE: An EPROM address generation circuit is provided to program or verify data even if some region of the whole EPROM cell is damaged, by making a start address in generating an EPROM address randomly changeable and using the remained region of the whole EPROM cell. CONSTITUTION: In a circuit, a start address register(10) stores a random address value. After adding the address value stored in the start address register to the address value of an internal address bus, the adder(10) outputs the added value. And then an address counter(12) reads the address value stored in the start address register and generates an address increasing sequentially by receiving a PROGRAM/VERIFY signal as a clock. And an address generation restriction apparatus(13) restricts the address counter to generate only the address value required to the program size. After a multiplexer(14) outputs the address value of the address counter and the address value of the address adder selectively, according to the state of an EPROM mode or a micro processor mode, an address decoder(15) generates a WORD/BIT LINE signal by decoding the address value selected in the multiplexer.
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