发明名称 BIAS CIRCUIT CAPABLE OF MINIMIZING SETTING TIME IN SWITCHED CAPACITOR CIRCUIT AND AMPLIFIER HAVING THE SAME
摘要 PURPOSE: A bias circuit capable of minimizing the setting in a switched capacitor and an amplifier having the same are provided to improve the operating speed by controlling the operating current supplied to the amplifier. CONSTITUTION: An amplifier comprises a plurality of amplifying terminals. A bias circuit section generates the first and second bias voltages so as to increase the transconductance of the amplifying terminals during a slew period and reduces the transconductance of the amplifying terminals during a setting period. The bias circuit section includes a control signal generating device(300) which generates a switch control signal in response to a clock signal applied from an exterior, the first bias generating circuit section which generates the first bias voltage so as to increase the transconductance of the amplifying terminal and the second bias generating circuit section which generates the second bias voltage so as to reduce the transconductance of the amplifying terminal during the slew period.
申请公布号 KR20010039369(A) 申请公布日期 2001.05.15
申请号 KR19990047733 申请日期 1999.10.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HWANG, SEONG UK;JUN, BYEONG RYEOL;JUN, YEONG DEUK;LEE, SEUNG HUN;SONG, JEONG U
分类号 H03F1/32;(IPC1-7):H03F1/32 主分类号 H03F1/32
代理机构 代理人
主权项
地址