发明名称 Method of forming junction diodes
摘要 A MOS gate and associated source/drain region structure providing three junction diodes between a source/drain contact area and the substrate, instead of the typical total of one, resulting in improved isolation of a source/drain contact area and a storage node which may be formed thereat. For fabricate the structure, a source/drain region is formed in a substrate having a space charge in the bulk or major part thereof, the source/drain region including: a first region having a space charge with a charge opposite that of a space charge in the major part of the substrate; a second region separated from the major part of the substrate by the first region and having a space charge with a charge opposite that of the space charge of the first region; and a third region separated from the first region and the major part of the substrate by the second region and having a space charge with a charge opposite that of the space charge of the second region. The first and second regions extend laterally under an associated gate. The third region extends laterally to the boundary of the region under the gate, and does not extend under the gate. The third region includes a portion of the surface of the substrate corresponding to a source/drain contact area. The source/drain region may be prepared by successive angled implants of alternating charge. A storage node may then be formed above the third region.
申请公布号 US6232190(B1) 申请公布日期 2001.05.15
申请号 US20000548418 申请日期 2000.04.13
申请人 MICRON TECHNOLOGY, INC. 发明人 GONZALEZ FERNANDO;KAO DAVID Y.
分类号 H01L21/8242;H01L27/108;(IPC1-7):H01L21/336 主分类号 H01L21/8242
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