发明名称 P-CHANNEL MOS TRANSISTOR AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE: To provide a p-channel MOS transistor, where a slow trap degradation is reduced, as well as a manufacturing method for a semiconductor device using the p-channel MOS transistor. CONSTITUTION: An n-type impurity region 16 is formed near a gate interface comprising a gate interface 15 between a gate electrode 14 and a gate oxide film 13. The n-type impurity region 16 is formed by injecting a n-type impurity such as arsenic (As) or phosphorus (P), and by changing the energy potential of the gate oxide film, a hole trap amount which causes slow trap is reduced. As the hole trap amount decreases, the slow trap deteriorates, in otherwords, a very large fluctuation in a threshold voltage caused by the slow trap as well as decrease in on-current which follows it, are prevented.
申请公布号 KR20010039770(A) 申请公布日期 2001.05.15
申请号 KR20000043829 申请日期 2000.07.28
申请人 NEC CORPORATION 发明人 MAKABE MARIKO
分类号 H01L29/78;H01L21/8238;H01L27/092;H01L29/772;(IPC1-7):H01L29/772 主分类号 H01L29/78
代理机构 代理人
主权项
地址