摘要 |
PURPOSE: A method and a device for calibrated frequency modulation phase locked loop are provided to control exactly modulation percentage by generating a current reference modulation based on the center frequency and achieve a modulated clock having a desired fixed percentage by calibrating the modulation system clock. CONSTITUTION: A frequency of the FMPLL(100) is controlled using a current controlled oscillator(ICO)(126). The ICO(126) receives a current signal incorporating feedback to maintain a fixed gain. The ICO(126) associated with the FMPLL(100) establishes a predictable change in the output frequency for a given change in its input controlled current(ICTL). Relying upon this fixed gain, a frequency shift can be created by summing in an additional delta current(IMOD) to the input control current. By periodically varying the magnitude of the current IMOD, a frequency modulated clock is produced at the output of the ICO(126). The magnitude of IMOD controls the amount of frequency shift of the frequency modulated clock. By providing an IMOD signal which is proportional to the generated system frequency, a frequency shift proportional to the average, or center, frequency is produced.
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