发明名称 |
Memory interface controller |
摘要 |
The present invention relates to a memory interface controller for a data transmission system. A memory interface controller is capable of randomly accessing a memory using an associative memory and variably processing data using an extended memory. There is provided a memory interface controller which includes a control logic unit for selectively outputting signals; a comparand register for storing a sequence number; an associative memory for outputting a match address; a priority address encoder for outputting a priority match address; an external memory controller for outputting an empty address of the associative memory; an external tended memory controller for outputting a priority empty address; and an extended memory address and control signal generator for generating an address and a control signal (enable/read/write).
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申请公布号 |
US6233646(B1) |
申请公布日期 |
2001.05.15 |
申请号 |
US19980143081 |
申请日期 |
1998.08.28 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
HAHM JIN HO |
分类号 |
G06F13/16;(IPC1-7):G06F12/00 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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