发明名称 METHOD AND DEVICE FOR ALIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: To eliminate such a problem that the data quantity is remarkably increased because the dummy patterns of a large quantity are generated collectively during the preparation of design data and synthesized. CONSTITUTION: This aligning method of semiconductor integrated circuit includes a step by which aligning pattern data per a specified unit area is extracted from aligning pattern data inputted in an aligning device, and the aligning pattern data extracted and a dummy pattern data for every specified unit area are merged and the aligning processing of the aligning pattern data and the dummy pattern data merged is executed for every area.
申请公布号 KR20010039544(A) 申请公布日期 2001.05.15
申请号 KR20000013008 申请日期 2000.03.15
申请人 FUJITSU LIMITED 发明人 YAMAUCHI SATOSHI
分类号 H01L21/027;G03F1/08;G03F1/20;G03F1/68;G03F7/20;H01J37/302;(IPC1-7):G03F7/20 主分类号 H01L21/027
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