发明名称
摘要 PROBLEM TO BE SOLVED: To reduce a time till a normal locking state is reached at momentary interruption of a modulation signal at raising of a power supply or the like. SOLUTION: A voltage controlled oscillator VCO receives a VCO control signal Dc via a logic circuit 84 and generates a sampling clock Cs and outputs an asynchronous alarm signal A1 in the asynchronous state. A differential coefficient discrimination circuit 82 discriminates a differential coefficient of a waveform at a current sampling based on output data Di, Dq and detects a deviation from an optimum sampling point and outputs a VCO control signal Dc. A data area discrimination circuit 83 discriminates a data area based on output data and discriminates a faulty state, then outputs a fault discrimination signal A2. A logic circuit 84 masks the VCO control signal Dc when the asynchronous alarm signal Al indicates an a synchronous state and the fault discrimination signal A2 denotes a fault.
申请公布号 JP3165080(B2) 申请公布日期 2001.05.14
申请号 JP19970224002 申请日期 1997.08.20
申请人 发明人
分类号 H04L27/22;H04L7/033 主分类号 H04L27/22
代理机构 代理人
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