| 摘要 |
PURPOSE: A method for manufacturing a capacitor is provided to increase capacitance without increasing an etching aspect ratio, by compounding the heights of the third and fourth oxide layers to control the capacitance. CONSTITUTION: The first oxide layer(20), a cell plug(30), a bit line conductive layer(40), a bit line cap(50) and a bit line sidewall(60) are sequentially formed on a semiconductor substrate(10) to form a bit line. The second oxide layer(70), the first nitride layer(80) and the third oxide layer(90) are formed on the resultant structure, and a storage node contact(100) connected to the cell plug is formed. The second nitride layer(110) is deposited on the resultant structure. The fourth oxide layer(120) is deposited on the resultant structure. The fourth oxide layer and the second nitride layer are dry-etched to expose the storage node contact and to form a hole. Polysilicon(130) is deposited on the resultant structure. Spin-on-glass(SOG) is applied to fill the hole, and an etch-back process is performed. The polysilicon exposed by the etch-back process is etched, and the SOG is eliminated. The fourth oxide layer between lower electrode of a capacitor and the second nitride layer under the fourth oxide layer are dry-etched. The exposed third oxide layer is wet-etched to extend the surface area of the lower electrode of the capacitor. A dielectric material(150) and a plate electrode(160) of the capacitor are deposited on the resultant structure.
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