发明名称 DEVICE AND METHOD FOR CONTROLLING INTERRUPTING PROCESSING
摘要 PROBLEM TO BE SOLVED: To generate break interruption even in an interruption inhibiting period just after an interrupting processing operation and just before interruption restoration. SOLUTION: At the time of the occurrence of normal interruption, the operation information on a processor before the generation of the normal interruption is held in a normal restoration address register 52, a normal original state register 53, and a normal factor register 54. At the time of the occurrence of break interruption, the operation information on the processor before the occurrence of the break interruption is held in another break restoration address register 55. Thus, it is possible to cause the break interruption even in an interruption inhibiting period due to the normal interruption. Also, the result is set in a flag register 56 at the time of the occurrence of the break interruption so that it is possible to correctly restore the operation information before the occurrence of the break interruption or the operation information before the occurrence of the normal interruption by referring to the flag register 56 at the time of executing an interruption restoration instruction.
申请公布号 JP2001125804(A) 申请公布日期 2001.05.11
申请号 JP19990309598 申请日期 1999.10.29
申请人 FUJITSU LTD 发明人 MIYAKE HIDEO;SUGA ATSUHIRO;NAKAMURA YASUKI
分类号 G06F11/28;G06F9/46;G06F9/48;(IPC1-7):G06F11/28 主分类号 G06F11/28
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