| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory provided with an output buffer having small layout area. SOLUTION: In an output buffer 49 of a DRAM, a level shifter 77 outputs a boosting potential VPP in accordance with it that an internal data signal ZRDHI is made a 'L' level or a test mode signature TMSIG1 is made a 'H' level. N channel MOS transistor 78 is conducted responding to the boosting potential VPP from the level shifter 77, and a data input/output terminal 70 is made a power source potential VCC. As the level shifter 77 and the N channel MOS transistor 78 are shared by the internal data signal ZRDH1 and the test mode signature TMSIG1, layout area can be reduced, and the test mode signature TMSIG1' of a high level can be outputted.
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