| 摘要 |
PROBLEM TO BE SOLVED: To reduce a hardware scale by calculating through the use of an arithmetic interpolation expression arranged so as to reduce the number of multiplying times, so as to reduce multiplication circuits. SOLUTION: In order to obtain pixel data of a pixel to be newly generated based on the first arithmetic interpolation expression obtained by arranging the first to fourth input pixel data X0 to X3, positional data (t) and a coefficient (a) included in an interpolation function by the first to third common terms and the second arithmetic interpolation expression obtained by additionally arranging the first arithmetic interpolation expression by the fourth common term, this interpolation arithmetic unit is provided with subtraction circuits 11 to 13 for obtaining values equivalent to the first to third common terms, an arithmetic circuit 20 for obtaining a value equivalent to the fourth common term and an adding circuit 25 for obtaining pixel data to be newly generated based on the outputs of these. |
