发明名称 DEVICE AND SYSTEM FOR PROCESSING DATA
摘要 <p>PROBLEM TO BE SOLVED: To relax the limitation of program capacity while maintaining satisfactory program execution efficiency in the comparatively small access space of a CPU in a data processor. SOLUTION: A data processor 1 has a normal mode with the narrow access space of a CPU 2 and an advanced mode with the wide access space. Even in the normal mode, a transfer control part 3 enables data transfer control over an address range accessible for the CPU at that time. Even when a program or the like is generated over the limitation of program capacity in respect to the access range of the CPU in the normal mode, by storing the program just for the excess of that limitation in the non-access area of a ROM 6 in the normal mode, the transfer control part can access this program and can transfer it to a RAM 7 and the CPU in the normal mode can access and utilize the program or the like transferred to the RAM.</p>
申请公布号 JP2001125786(A) 申请公布日期 2001.05.11
申请号 JP19990306328 申请日期 1999.10.28
申请人 HITACHI LTD;HITACHI HOKKAI SEMICONDUCTOR LTD 发明人 TOMONAGA KAZUHIRO;IWATA KATSUMI
分类号 G06F9/32;G06F9/34;G06F12/02;G06F12/06;G06F13/16;G06F15/78;(IPC1-7):G06F9/32 主分类号 G06F9/32
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