发明名称 BUS ANALYZER
摘要 PROBLEM TO BE SOLVED: To realize a bus analyzer with high reliability that can prevent missing of captured data by detecting occurrence of a bus reset storm. SOLUTION: The bus analyzer that captures packet data communicated through a bus so as to measure and analyze a state of the bus, includes a counter that counts the number of bus reset signals communicated through the bus, a timer that controls a count time of this counter, and a discrimination section that discriminated the occurrence of the bus reset storm when the count of the counter reaches a prescribed value.
申请公布号 JP2001127778(A) 申请公布日期 2001.05.11
申请号 JP19990306727 申请日期 1999.10.28
申请人 YOKOGAWA ELECTRIC CORP 发明人 KURIYAMA KAZUYA
分类号 G06F13/00;H04L12/40;(IPC1-7):H04L12/40 主分类号 G06F13/00
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