| 摘要 |
PROBLEM TO BE SOLVED: To provide a redundant calculating system whose resolution calculation processing speed per one memory device is fast. SOLUTION: A fail memory 1 stores an address of a defective memory cell existing in a memory device (not illustrated) and a data bit (fail information). Also the memory device has plural row spare lines consisting of plural spare memory cells existing in the same row address and plural column spare lines consisting of spare memory cells existing in the same column. A fail search circuit 2 reads fail information of all defective cells and outputs it to arithmetic and logic units 7-1 to 7-n through FIFO memory 3-1 to 3-n. The arithmetic and logic units 7-1 to 7-n calculate a row spare line or a column spare line used for substitution of row or column, in which a defective memory cell exists, by different systems from addresses of all defective memory cells and addresses of all row and column spare lines.
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