发明名称 Low phase noise clock multiplication
摘要 A generator of high frequency signals comprises a delay element and a switching element, whereby the delay element causes a delay of pi/4 radians, and the switching element is switching to produce an output at the fundamental frequency, but with enriched even harmonic content. A filter selects the desired harmonic, and passes this on as an output. Additionally, a maximizing circuit may vary the phase of the delay element to maximize the output level of the generator.
申请公布号 US6229359(B1) 申请公布日期 2001.05.08
申请号 US19990476284 申请日期 1999.12.31
申请人 CISCO TECHNOLOGY, INC. 发明人 CHESAVAGE JAY A.
分类号 H03K5/00;(IPC1-7):H03B19/00 主分类号 H03K5/00
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