Phase locked loop lock condition detector

摘要

A lock condition detector for determining whether two signals are within a specified lock condition includes a phase detector which determines whether the first and second signals are within a prescribed phase condition and a frequency detector which determines whether the two signals are within a prescribed frequency relationship. An analyzer outputs a lock condition signal indicative of the first and second signals being out of lock whenever the phase condition signal indicates that the two signals are outside of the phase condition and whenever the frequency condition signal indicates that the two signals are outside of the prescribed frequency condition. The combination of the phase detector and the frequency detector prevents an erroneous in-lock condition signal when the two signals are in phase but at multiple frequencies of each other, as well as eliminates a high frequency data stream when there is a large frequency error between the two signals which would occur if only a phase detector were used.