Method of making high performance MOSFET with enhanced gate oxide integration and device formed thereby

摘要

Transistors formed according to the present invention include an oxide layer/nitride layer gate insulator and a silicide gate conductor. An oxide layer is formed to a thickness of between 15 and 25 Angstroms across a substrate and partially removed so that a thickness of approximately 4 Angstroms remains. A nitride layer is formed upon oxide layer to a thickness of 10 to 20 Angstroms. Polysilicon gate conductors are then formed above the active regions of the substrate using a deposition and patterning technique. Spacers are then formed about the polysilicon gate conductor, lightly doped drain regions are formed and then source/drain regions are formed. In forming the lightly doped drain regions and the source/drain regions, the polysilicon gate conductor is doped. Then, a silicidation metal layer is deposited upon the polysilicon gate conductors and exposed portions of the nitride layer. The resultant structure is then subjected to an annealing step in which the polysilicon gate conductor is converted to a silicide gate conductor having a relatively lower bulk resistance. The remaining portions of the silicide metal layer are removed. Openings are then made to the source/drain regions through which interconnections are made to the transistor. A plurality of transistors formed according to this technique may be interconnected to form an integrated circuit.