发明名称 Semiconductor memory device using inverter configuration
摘要 A semiconductor memory device provided with a plurality of memory cells each including first transistors having first conductivity type and second transistors having a second conductivity type, each memory cell comprising a first active region where channels of the first transistors are formed and a second active region where channels of the second transistors are formed, the first and second active regions being arranged so that the directions of channel currents of the transistors become parallel to each other in each cell and being separated between adjoining memory cells in a direction perpendicular to the directions of channel current.
申请公布号 US6229186(B1) 申请公布日期 2001.05.08
申请号 US19990301982 申请日期 1999.04.29
申请人 SONY CORPORATION 发明人 ISHIDA MINORU
分类号 H01L21/3205;G11C11/412;H01L21/8238;H01L21/8244;H01L27/092;H01L27/11;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L21/3205
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