发明名称 DIGITAL CONVERGENCE CIRCUIT
摘要 PURPOSE: A digital convergence circuit is provided to optimize the capacity of a memory by interpolating convergence correction data, inserting a line between scanning lines, and adjusting a convergent correction rate in real time. CONSTITUTION: A digital convergence circuit comprises a clock generating unit(1) for generating a clock corresponding to on a horizontal blanking signal, an address generating unit(2) for generating an address by detecting a vertical blanking signal corresponding to the clock, a memory(3) for outputting convergence correction data corresponding to the address, a signal interpolating unit(10) for interpolating the convergence correction data of the memory, a signal processing unit(4) for converting RGB(Red, Green, and Blue) signals into parallel data, a digital/analog converting unit(5) for converting the output of the signal processing unit into analog signals, a low band pass filter(6) for waveform shaping the output of the digital/analog converting unit after removing high band elements, a deflection unit(7) for amplifying the output of the low band pass filter and outputting the amplified output to a yoke coil(CY), and a central processing unit(8) for outputting convergence correction data by operating the convergence adjusting point data and correcting the prior convergence correction data.
申请公布号 KR100296276(B1) 申请公布日期 2001.05.08
申请号 KR19930026519 申请日期 1993.12.04
申请人 LG ELECTRONICS INC. 发明人 NAM, GYU YEON
分类号 H04N9/28;(IPC1-7):H04N9/28 主分类号 H04N9/28
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