| 摘要 |
PURPOSE: A VC(Virtual Container) mapper on an SDH(Synchronous Digital Hierarchy) is provided to embody a VC mapper with a small number of gates in the case of executing VCx mapping. CONSTITUTION: A VC mapper on an SDH is composed of an STM-1(Synchronous Transport Module-level 1) address generation part(11), a mapper address generation part(12), an ATM-1 formatter(13), a plurality of control parts(14-16) and a plurality of VC11/12/3/4 processing parts(17-19). The STM-1 address generation part(11) generates the address of an STM-1. The mapper address generation part(12) generates the address of a mapper. The ATM-1 formatter(13), receiving the address signal from the STM-1 address generation part(11) and a VC3 signal and a VC3/4 signal from the mapper address generation part(12), forms and outputs an STM-1 format. The control parts(14-16) receive control signals from the mapper address generation part(12) and output control signals for the options of DS3, DS3E, AU3 and TUG-3. The VC11/12/3/4 processing parts(17-19), respectively receiving control signals from the control parts(14-16), process VC11/12/3/4 and VC11/12/3 respectively.
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