METHOD FOR MANUFACTURING MEMORY CELL OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for manufacturing a memory cell of a semiconductor device is provided to reduce a cell size by connecting a common source electrode as a metal wiring and forming a contact plug on a drain electrode. CONSTITUTION: A floating gate electrode(606') and a control gate electrode(610') are formed on a semiconductor substrate. A source electrode(614) and a drain electrode(616) are formed on an exposed region of the semiconductor substrate. The first interlayer dielectric is laminated and flattened on the semiconductor substrate. The first contact hole is formed by removing partially the first interlayer dielectric. The first conductive material is buried into the first contact hole. The first conductive material is formed on the first contact hole. A source electrode wiring(622a) and a contact plug(622b) are formed by removing partially the first conductive material. The second interlayer dielectric(628) is formed on an upper portion of the first interlayer dielectric, an upper portion of the source electrode wiring(622a), and an upper portion of the contact plug(622b). The second contact hole is formed by removing the second interlayer dielectric. A bit line(630) is formed to be connected with the contact plug(622b).