发明名称 METHOD FOR FORMING SHALLOW TRENCH ISOLATION REGION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a shallow trench isolation region of a semiconductor device is provided to prevent a groove produced at an edge of the region. CONSTITUTION: In the method, a pad oxide layer(102) and an etch stop layer(104) are formed in sequence on a semiconductor substrate(100) and then etched to expose a field region of the substrate(100). The exposed region of the substrate(100) is etched to form a trench, and the first oxide layer(106) is formed along an inner wall of the trench. The second oxide layer(108) is then formed on a resultant structure enough to fill the trench and polished to expose the etch stop layer(104). Thus, the shallow trench isolation region is formed with the first and second oxide layers(106,108). Thereafter, the second oxide layer(108) is etched to have the same plane as the substrate(100). Next, a polysilicon layer is formed on a resultant structure and polished or etched back. The polysilicon layer is then oxidized so that a thermal oxide layer(110a) is selectively formed on the shallow trench isolation region. The thermal oxide layer(110a) is removed after the etch stop layer(104) and the pad oxide layer(102) are removed.
申请公布号 KR20010035981(A) 申请公布日期 2001.05.07
申请号 KR19990042796 申请日期 1999.10.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JIN HO;SONG, BYEONG CHEOL
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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