发明名称 METHOD FOR REDUCING CAPACITANCE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for reducing capacitance of a semiconductor device is provided to remarkably reduce parasitic capacitance, by forming a void in an inter-metal dielectric to decrease a relative dielectric constant of the inter-metal dielectric. CONSTITUTION: The first interlayer dielectric(21), a conductive layer(22) and a cap insulating layer are sequentially formed on a semiconductor substrate. The cap insulating layer and the conductive layer are sequentially patterned to form an inter-metal pattern(220,230) of a stacked structure composed of the remaining cap insulating layer and conductive layer. The second interlayer dielectric(25) having a void is formed on the first interlayer dielectric including the inter-metal pattern.
申请公布号 KR20010035659(A) 申请公布日期 2001.05.07
申请号 KR19990042350 申请日期 1999.10.01
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KWON, U HYEON
分类号 H01L21/31;(IPC1-7):H01L21/31 主分类号 H01L21/31
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