发明名称 |
Memory structure in ferroelectric nonvolatile memory |
摘要 |
Each of memory cells of a ferroelectric nonvolatile memory includes a MOS field effect transistor and first and second ferroelectric capacitors whose remnant polarization amounts are substantially equal to each other. One-side electrodes of the first and second ferroelectric capacitors are connected to the gate electrode of the MOS field effect transistor. Information is stored by polarizing the thin ferroelectric films of the first and second ferroelectric capacitors in opposite directions to each other with respect to the gate electrode of the MOS field effect transistor. Information is read out by applying a positive voltage pulse to one of the other electrodes of the first and second ferroelectric capacitors while the other one of the other electrodes is kept in the electrically floating state. Further a negative voltage pulse having an absolute value smaller than the positive voltage pulse may be applied, if necessary.
|
申请公布号 |
US2001000688(A1) |
申请公布日期 |
2001.05.03 |
申请号 |
US20000749960 |
申请日期 |
2000.12.27 |
申请人 |
SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER |
发明人 |
ISHIWARA HIROSHI |
分类号 |
G11C14/00;G11C11/22;H01L21/8246;H01L21/8247;H01L27/10;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C11/22 |
主分类号 |
G11C14/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|