发明名称 Logic circuit utilizing capacitive coupling, an AD converter and a DA converter
摘要 According to the present invention, various logic circuits, AD converters, DA converters and counter circuits can be constituted with a small number of transistors by employing a capacitive coupling circuit. An analog/digital converter comprises: an input terminal, for which analog input is provided; an output terminal of N (N is a plural number) bits, for which binary output is provided; and N unit circuits arranged in parallel, each including an input capacitor having one electrode connected to the input terminal, a first inverter connected to the other electrode of the input capacitor, and a second inverter connected to the first inverter, wherein outputs of the second inverters of the unit circuits are respectively provided for the output terminals, wherein inverted outputs of the outputs for the unit circuits are fed back via feedback capacitors to respective input terminals of the first inverters of the unit circuits corresponding to lower bits, and wherein a capacitance of the feedback capacitor, which corresponds to the inverted output of the M-th (M is an integer) unit circuit from the most significant bit, is ½M times a capacitance of the input capacitor of the unit circuit that is fed back.
申请公布号 US2001000661(A1) 申请公布日期 2001.05.03
申请号 US20000741197 申请日期 2000.12.21
申请人 FUJITSU LIMITED 发明人 MIYAMOTO YOSHIHIRO
分类号 H03M1/44;G06F7/50;H03K5/08;H03K19/08;H03K19/23;H03M1/12;H03M1/14;H03M1/40;H03M1/42;H03M1/46;H03M1/60;H03M1/66;H03M1/68;H03M1/74;(IPC1-7):H03M5/02 主分类号 H03M1/44
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