WIDE CONNECTIONS FOR TRANSFERRING DATA BETWEEN PE'S OF AN N-DIMENSIONAL MESH-CONNECTED SIMD ARRAY WHILE TRANSFERRING OPERANDS FROM MEMORY

摘要

A single-instruction multiple-data (SIMD) array processor (fig. 1) providing enhanced data transfer efficiency. The SIMD array processor includes at least one memory and a plurality of mesh-connected processing elements configured in an array. Each processing element (fig. 1, units 104, 106 etc.) in the array includes at least one 'narrow' memory buffer, at least one 'wide' data register, and at least one 'wide' communication register. The narrow memory buffer is adapted to transfer data serially between the memory and the wide data register, the wide data register is adapted to transfer data directly to the wide communication register, and the wide communication register is adapted to transfer data directly to the communication register of a neighboring processing element while the memory buffer is accesssing data from the memory.