| 摘要 |
<p>The memory cell (101) is of the type with a single level of polysilicon, and is produced in a substrate (102) of semiconductor material with a first type of conductivity, and comprises a control gate region (6) with a second type of conductivity, formed in the substrate (102) in a first region of active area (30); regions of source (4a, 4b) and drain (5a, 5b) with the second type of conductivity, formed in the substrate (102) in a second region of active area (31); and a floating gate region (9) which extends transversely relative to the first (30) and the second (31) regions of active area. The control gate region (6) is surrounded by a first well (103) with the first type of conductivity, which in turn is surrounded, below and laterally, by a third well (108) with the second type of conductivity. The regions of source (4a, 4b) and drain (5a, 5b) are accommodated in a second well (104) with the first type of conductivity, which in turn is surrounded below and laterally by a fourth well (112) with the second type of conductivity. <IMAGE></p> |
