| 摘要 |
Methods and circuits for the generation and application of sample rate conversion ratios using distributed jitter. In some applications, it is not possible to represent the required sample rate conversion ratio with an exact fractional binary ratio having a denominator that is a power of two. When this occurs, a fractional binary ratio is selected that approximates the required conversion ratio. The residual phase error resulting from the use of the selected fractional binary ratio is then computed and compensated for by adding a predetermined amount of "jitter." The jitter can be distributed periodically, uniformly, or randomly over each repetition period, the period between which the input and output clock pattern repeats.
|
