发明名称 Three-level neutral point clamping type inverter circuit
摘要 In a three-level neutral point clamping type inverter circuit which includes a positive bus line (4), a negative bus line (5) and a neutral line (6), wherein first and second IGBTs (11), (12) are connected in series between the positive bus line (4) and a phase voltage output terminal (10) and third and fourth IGBTs (13), (14) are connected in series between the negative bus line (5) and the phase voltage output terminal (10), the three-level neutral point clamping type inverter circuit further includes a first snubber capacitor (21) provided between the positive bus line (4) and the neutral line (6), a second snubber capacitor (22) provided between the negative bus line (5) and the neutral line (6), a first snubber diode (23) having a cathode coupled to the positive bus line (4) and an anode coupled to the phase voltage output terminal (10), and a second snubber diode (24) having an anode coupled to the negative bus line (5) and a cathode coupled to the phase voltage output terminal (10).
申请公布号 US6226192(B1) 申请公布日期 2001.05.01
申请号 US20000529514 申请日期 2000.04.14
申请人 KABUSHIKI KAISHA YASKAWA DENKI 发明人 YAMANAKA KATSUTOSHI;YAMADA KENJI;KUMAGAE AKIRA;TERADA TAKAAKI
分类号 H02M7/483;(IPC1-7):H02H7/122 主分类号 H02M7/483
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