发明名称 ONE CHIP MICROCOMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To provide a watchdog timer circuit capable of coping with an abnormality of a hardware factor and coping with an abnormality only of a specified processing of a program as well. SOLUTION: In this one chip microcomputer 10 by which processings are successively performed by a single task, a numerical value update module 13 has plural numerical values according to the number of outputted bits inside, performs an update processing by outputting the numerical values at every operation, an operation control module 14 compares the numerical values to be updated in the same way as the numerical values to be updated inside the numerical value update module 13 with the numerical values outputted from the numerical value update module 13, outputs clear signals to the watchdog timer circuit whenever they coincide with one another, simultaneously performs the update processing of the numerical values provided inside and an external input/output port 12 is externally connected so as to input output from the numerical value update module 13 into the operation control module 14.</p>
申请公布号 JP2001117795(A) 申请公布日期 2001.04.27
申请号 JP19990300117 申请日期 1999.10.21
申请人 TOYO COMMUN EQUIP CO LTD 发明人 KAWASUMI SHINICHI
分类号 G06F11/30;G06F15/78;(IPC1-7):G06F11/30 主分类号 G06F11/30
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