发明名称 MULTITASK PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To prevent the occurrence of a trouble in operation of a processor on the receiving side even when data is transmitted at an overrate higher than a normal transmission rate due to an abnormality of an external device. SOLUTION: All pieces of the data to which IDs by every one of external devices U1 to U5 are attached are normally received by an interruption register IR, immediately transferred to a ring buffer 2 and transferred to a data table 3 at a specified cycle. When the overrate data is transmitted, an overwrite state of the ring buffer 2 is detected, an ID list of the overrate data is created and the ID is set in registers R1 to R7 with ID by which the data is transferred to the data table 3 at the specified cycle in a control part 1. Since the data in which the ID is set is received by the applicable register with ID and only the remaining pieces of data at normal rate are received by the interruption register IR by N ID masking part 4, data transfer from the interruption register IR is not so frequently performed as to hinder execution of other processings.
申请公布号 JP2001117785(A) 申请公布日期 2001.04.27
申请号 JP19990294443 申请日期 1999.10.15
申请人 NISSAN MOTOR CO LTD 发明人 WON RICARDO
分类号 G06F13/00;G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F13/00
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