| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide an extra large-scale integrated circuit having a high aspect ratio function by using a technology for forming low-k dielectric ILDs having such an integrated circuit structure that avoids the harmful trend of high density plasma enhanced CVD (HDP-CVD) and, at the same time, reduces the occurrence of voids; a process for depositing a low-k dielectric material in the extra large- scale integrated circuit; and an integrated circuit manufactured by using the process. SOLUTION: An integrated circuit manufacturing technology by which a protective layer is deposited on the conductive elements of a specific layer in a multilayered integrated circuit is disclosed. A low-k dielectric layer is deposited on a protective film forming material layer by, preferably, HDP-CVD. The disclosed process fills up the gap of <300 nm between metallic functions with a high aspect ratio conductive function (>=3). By means of the fluorine embodied in the embodiment, the interline capacitance CL-L of the low-k dielectric film is reduced by 10% as compared with the conventional non-doped dielectric material.</p> |
